diff --git a/04-adc/README.md b/04-adc/README.md
index 38ea0ec..0ba7135 100644
--- a/04-adc/README.md
+++ b/04-adc/README.md
@@ -55,9 +55,11 @@ The Successive Approximation ADCs are independent circuits that work similar to
 1. Is the voltage over 1.6v?
 2. If so, is it over 2.4v?
 3. If not, is it over 2.0?
-4. If not, is it over 2.2?
+4. If so, is it over 2.2?
 
-.... and it keeps doing this, walking down into smaller and smaller slices of the maximum possible value, until it figures out where the right value is. It does this independently of the CPU; each ADC has its own clocks, arbiter, registers, timers, threshold monitors, etc etc. However it does cooperate with the ULP coprocessor (an ultra low power coprocessor that still runs when the CPU is in deep sleep mode); the ULP triggers the SAR ADC measurements and reads the results, and it has a bunch of registers related to managing the RTC and ADC and their associated interrupts. Honestly the ULP is a fascinating little device in itself.
+.... and it keeps doing this, walking down into smaller and smaller slices of the maximum possible value, until it figures out where the right value is. It does this independently of the CPU; it cooperates with the ULP coprocessor (an ultra low power coprocessor that still runs when the CPU is in deep sleep mode). The ULP triggers the SAR ADC measurements and reads the results, and it has a whole separate set of real time clocks, timers, registers etc to manage the peripherals and their associated interrupts. Honestly the ULP is a fascinating little device in itself, capable of acting in either FSM or RISC-V modes depending on how it's programmed. 
+
+[The technical reference manual](https://documentation.espressif.com/esp32-s3_technical_reference_manual_en.pdf) for the ULP is 35 pages, and the ADCs themselves get another 11 pages. Knock yourself out.
 
 ## Measuring Capacitance